Optimization of input process parameters variation on threshold voltage in 45 nm NMOS device
نویسندگان
چکیده
College of Engineering, Universiti Tenaga Nasional (UNITEN), Kajang, Selangor, Malaysia. Faculty of Engineering and Built Environment, Universiti Kebangsaan Malaysia (UKM), Bangi, Selangor, Malaysia. School of Microelectronic Engineering, Universiti Malaysia Perlis (UniMAP), Arau Perlis, Malaysia. Indian Institute of Technology (IIT), Bombay, Powai, Mumbai, India. Faculty of Electronic and Computer Engineering, Universiti Teknikal Malaysia Melaka (UTeM), Durian Tunggal, Melaka, Malaysia.
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